1. Field of the Invention
The present invention relates to a packet-type semiconductor memory device, and more particularly, to a current control circuit for controlling the current driving capability of an output driver in a packet-type semiconductor memory device.
2. Description of the Related Art
Recently, semiconductor memory devices which receive data and addresses in units of a packet, such as, RamBus DRAMs, have been put into use to achieve high-speed operation of semiconductor memory devices. In a system adopting the packet-type semiconductor memory device, as shown in FIG. 1, a memory controller 109 and a plurality of memory devices 101 through 108 are commonly connected to signal lines B1 through Bn which are typically called channels. Thus, the packettype semiconductor memory device includes a current control circuit for finely controlling the current driving capability of an output driver according to the size of a load which is applied to a pad.
FIG. 2 is a circuit diagram of a packet-type semiconductor memory device including a conventional current control circuit. Here, only circuits associated with the current control of an output driver are shown.
Referring to FIG. 2, the semiconductor memory device includes first and second pads P21 and P22, an output driver O21, a current control circuit CT21, and a control circuit L21. The conventional current control circuit CT21 includes first and second transfer gates T21 and T22, a voltage divider, a comparator C21, and a current control counter D21. The first transfer gate T21 transfers the voltage of the first pad P21, that is, an output high voltage (VOH) in response to a current control enable signal CCTG. The second transfer gate T22 transfers the voltage of the second pad P22, that is, an output low voltage (VOL) in response to the current control enable signal CCTG. The voltage divider includes resistors R21 and R22, and divides a voltage ranging between the outputs of the first and second transfer gates T21 and T22 and outputs a divided voltage Vcmp. The comparator C21 compares the divided voltage Vcmp with the reference voltage Vref. The current control counter D21 generates control bits ICTRO through ICTR5 for controlling the current driving capability of the output driver O21 in response to the output of the comparator C21.
However, in the conventional current control circuit CT21, when the absolute values of the resistances of the resistors R21 and R22 of the voltage divider are made small to quickly bring the divided voltage Vcmp to a steady state, an increased amount of current flows through the resistor R21 and R22, so that the levels of the output high voltage VOH and output low voltage VOL are changed. Accordingly, the divided voltage Vcmp becomes different from an original target value, that is, (VOH+VOL)/2. However, when the amount of current flowing through the resistors R21 and R22 is reduced by increasing the absolute values of the resistances of the resistors R21 and R22 to prevent such a problem, the amount of time taken for the divided voltage Vcmp to reach a steady state greatly increases.
Also, the conventional current control circuit CT21 uses transfer gates as transfer means for transferring the voltage VOH of the first pad and the voltage VOL of the second pad, such that the divided voltage Vcmp is different from an original target value even if the effective resistances of the first and second transfer gates T21 and T22 become different from each other due to factors such as a change in the manufacturing process, a change in temperature, or the like.